Silicon photonics is a matured technology today for optical communication transceiver industries. Besides transceiver, other upcoming application areas for silicon photonics are depicted in the cartoon figure below. Present research focus of the CPPICS team is mainly cantering around design, demonstration and packaging of photonic chips for advanced microwave and quantum photonic applications.

Owing to the success of high-speed silicon photonic transceivers in the data centres, demand for similar products in several other fields has emerged. Microwave photonics is one such field where the THz bandwidth of photonics can overcome the limitations in conventional microwave components. The futuristic communication systems target to operate in the high frequency (10s of GHz) to meet the ever-increasing demand of data consumption. The design of microwave components such as filters, oscillators, phase shifters to operate at these frequencies with a small footprint (cm x cm) is challenging.

Our current focus is on the following research topics:

  • Demonstration of a packaged photonic RF filter chip, over a wide range of frequencies (up to 40 GHz), with the necessary electronic interfacing with the optical signal processor,
  • Development of a fully packaged RF filter with a tunable bandwidth (0.1-1% of the central frequency)
  • Realization of Optoelectronic oscillators and on-chip photonic beamformer for mm-wave applications


With the success and groundbreaking results of quantum optics, integrated quantum photonics took a flight in the last two decades. With the advantage of CMOS compatible fabrication technology, it aims for a scalable, cost-efficient technological platform for its potential applications. Still, there are plenty of challenges ahead to make the technology better and commercially available. Here at our CoE, we are working towards efficiently demonstrating various basic building blocks and functionalities useful within the technology.

Our current focus is on the following research topics:

  • Development of bright heralded photon-pair sources for Quantum Information Processing (QIP) in Silicon On Insulator Platform.
  • Demonstration of high speed, low cost, compact Quantum Random Number Generator in Silicon On Insulator Platform.
  • Building on-chip Quantum Key Distribution (QKD) system to achieve high speed, the low bit error rate for the large-scale system.
  • Quantum computation using linear interferometers.

Photonic IC (PIC) packaging requires both electrical as well as optical interfacing. Current packaging strategies include monolithic co-integration, flip-chip bonding, and hybrid integrations. However, no standard packaging rules have been recognized so far for universal usages. Recently, there have been demands for multifunctional Field Programmable Photonic Gate Array (FPPGA) alongside presently available Application Specific PIC (ASPIC) design modules. CoE-CPPICS has committed to developing indigenous PIC design rules and hardware infrastructure for precision packaging in in-house system-level applications and field trials. In this mission, CoE-CPPICS IIT Madras has signed an MoU with Si2 Microsystems, Bangalore ( for joint development of packaging rules, transfer of technology and futuristic start-up business.